Configuration control in a programmable logic device using non-volatile elements
US5968196A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1998 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Apr 21, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318516
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A boundary scan test circuit (JTAG) interface is used to provide data for a set of configuration latches within a Configuration Register. The Configuration Register is included within the JTAG structure as a Test Data Register (TDR). Each configuration bit within the Configuration Register consists of a Configuration Latch, and each configuration latch has an output used as a configuration control signal within an output logic macrocell. The configuration register's input signal is selectably provided from either a set of serially connected configuration bit non-volatile element sense latches or from the JTAG Test Data In (TDI) data pin for reconfiguration, prototyping, and testing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.