William Saiki
24Patents
9h-index
25Co-inventors
71Inventor score
Filing activity: Dec 8, 1997 → Sep 20, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6867638B2 | High voltage generation and regulation system for digital multilevel nonvolatile memory | Physics | 211 | Expired |
| US5968196A | Configuration control in a programmable logic device using non-volatile elements | Physics | 81 | Expired |
| US6885600B2 | Differential sense amplifier for multilevel non-volatile memory | Physics | 44 | Expired |
| US5848026A | Integrated circuit with flag register for block selection of nonvolatile cells for bulk operations | Physics | 31 | Expired |
| US6590825B2 | Non-volatile flash fuse element | Physics | 26 | Expired |
| US7038960B2 | High speed and high precision sensing for digital multilevel non-volatile memory system | Physics | 21 | Expired |
| US6992937B2 | Column redundancy for digital multilevel nonvolatile memory | Physics | 19 | Expired |
| US6788608B2 | High voltage pulse method and apparatus for digital multilevel non-volatile memory integrated system | Physics | 16 | Expired |
| US6813194B2 | Bias distribution network for digital multilevel nonvolatile flash memory | Physics | 9 | Expired |
| US7061295B2 | Ring oscillator for digital multilevel non-volatile memory | Physics | 8 | Expired |
| US7325177B2 | Test circuit and method for multilevel cell flash memory | Physics | 8 | Expired |
| US6590453B2 | Folded cascode high voltage operational amplifier with class AB source follower output stage | Electricity | 8 | Expired |
| US8213233B2 | Reduction of quick charge loss effect in a memory device | Physics | 7 | Active |
| US7038538B2 | Folded cascode high voltage operational amplifier with class AB source follower output stage | Electricity | 4 | Expired |
| US7596037B2 | Independent bi-directional margin control per level and independently expandable reference cell levels for flash memory sensing | Physics | 4 | Active |
| US6967524B2 | High voltage generation and regulation system for digital multilevel nonvolatile memory | Physics | 3 | Expired |
| US8169832B2 | Methods of erase verification for a flash memory device | Physics | 3 | Active |
| US7835190B2 | Methods of erase verification for a flash memory device | Physics | 3 | Active |
| US7939892B2 | Test circuit and method for multilevel cell flash memory | Physics | 2 | Active |
| US7826267B2 | Method and apparatus for reading and programming a non-volatile memory cell in a virtual ground array | Physics | 2 | Active |
| US7184345B2 | High speed and high precision sensing for digital multilevel non-volatile memory system | Physics | 1 | Expired |
| US8027200B2 | Reduction of quick charge loss effect in a memory device | Physics | 1 | Active |
| US7831872B2 | Test circuit and method for multilevel cell flash memory | Physics | 1 | Active |
| US7661041B2 | Test circuit and method for multilevel cell flash memory | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.