Wafer stage for manufacturing a semiconductor device
US5968273A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 1997 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Aug 13, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/6831
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Disclosed is a wafer stage allowing a plasma process under a heating condition at a high temperature, particularly, 400.degree. C. or more using the improved electrostatically chucking technology with the increased temperature-controllability. The wafer stage includes an electrostatic chuck and a temperature adjusting jacket disposed under said electrostatic chuck. The electrostatic chuck includes: a dielectric member made from an insulating material; an electrode formed of a brazing layer, which is disposed on the underside of said dielectric member for fixing said dielectric member; an aluminum nitride plate disposed on the underside of said electrode, to which said dielectric member is fixed through said electrode; a heater, disposed on the underside of said aluminum nitride plate, for heating said dielectric member; and a metal plate disposed on the underside of said aluminum nitride plate and also at least on a top or bottom side of said heater. The temperature adjusting jacket is made from a composite aluminum based material prepared by treatment of aluminum or an aluminum alloy with inorganic fibers under a high pressure, and includes a temperature adjusting means.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.