Latch-up free power UMOS-bipolar transistor
US5969378A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 10, 1997 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Jul 10, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/121
Abstract
A MOS bipolar transistor is provided which includes a silicon carbide npn bipolar transistor formed on a bulk single crystal n-type silicon carbide substrate and having an n-type drift layer and p-type base layer. A silicon carbide nMOSFET is formed adjacent the npn bipolar transistor such that a voltage applied to the gate of the nMOSFET causes the npn bipolar transistor to enter a conductive state. The nMOSFET has a source and a drain formed so as to provide base current to the npn bipolar transistor when the bipolar transistor is in a conductive state. Also provide are means for converting electrons flowing between the source and the drain into holes for injection into the p-type base layer. Unit cells and methods of forming such devices are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.