Manufacturing capping layer for the fabrication of cobalt salicide structures
US5970370A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 1998 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Dec 8, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/902
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved process for manufacturing cobalt silicide layers uses two capping layers. A first capping layer of titanium nitride prevents the formation of a cobalt/titanium intermetallic. A subsequently formed titanium metallic layer getters impurities from outgassing and the ambient preventing corruption of the cobalt layer. Two rapid thermal annealing steps convert the cobalt at the cobalt/silicon intermetallic into highly conductive cobalt disilicide. The cobalt silicide does not suffer from linewidth dependent increases in resistivity. Therefore, the cobalt disilicide formed by the present method is useful for semiconductor devices with linewidths and feature sizes less than 0.20 .mu.m. The process has wide applicability and may be used to fabricate local circuit interconnects, floating gates, double polysilicon stacked floating gates as well as other uses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.