Layered silicon nitride deposition process
US5981403A · kind A · utility
15Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 24, 1997 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | Nov 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device process for forming a multilayered nitride structure. The nitride is used as either isolation or as part of a dielectric structure. The deposition rate for the nitride is varied to form a multilayered structure with stress accommodation at the interface between sub-layers in the multilayer structure. In addition, the sub-layered structure reduces pin-holes and microcracks in the nitride film and improves the overall uniformity in thickness of the final nitride film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.