Method for obtaining a steep retrograde channel profile
US5989963A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 1997 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Jul 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/314
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device with a steep retrograde profile. The threshold voltage adjust dopant layer and the punchthrough prevent dopant layer are formed in the substrate. All surface capping layers are removed from the active device regions and, the semiconductor device is placed in a chamber and a high vacuum is established after which an inert atmosphere is introduced into the chamber. The anneal to repair the damage to the lattice and to activate the dopant ions in the dopant layers is done in the inert atmosphere with the surface of the substrate maintained clean, that is, free from a capping oxide or other layer formed on the surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.