Semiconductor device having plated contacts and method thereof
US5990547A · kind A · utility
26Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 2, 1998 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Mar 2, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09627
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A package substrate (11) having access to a plating bus (36, 38) through intermediate routing layers (4, 6). Specifically, electrical contact between a solder pad (16, 19, 51), and its respective bond post (27), if any, is made by routing a trace (32, 52) through an intermediate routing layer (4, 6). The trace (32, 52) begins within a final package dimension (10) and extends to a peripheral portion (12) which is excised during manufacturing. There is a conductive trace (32, 52) visible from the side of the final packaged device (10').
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.