Data communication for memory
US6002613A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 1997 |
| Grant date | Dec 14, 1999 |
| Priority date | — |
| Expiry date | Nov 10, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory circuit is described which includes memory cells for storing data. The memory circuit can be read from or written to by an external system such as a microprocessor or core logic chip set. The microprocessor provides memory cell address data to the memory circuit and can request that data be output on communication lines for reading therefrom. The memory circuit reduces the time needed to read data stored in the memory by providing a valid output data signal. The valid output data signal indicates that data coupled to the communication lines has stabilized and is therefore valid. Different valid output data signals and trigger circuits for producing the signals are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.