Method for characterizing interconnect timing characteristics
US6005829A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 21, 1998 |
| Grant date | Dec 21, 1999 |
| Priority date | — |
| Expiry date | May 21, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318516
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A reference ring oscillator circuit (RROC) is used to determine timing characteristics of a test interconnect structure in an integrated circuit. The RROC includes an odd number of inverters coupled together in a ring manner and has defined test segments at which a test interconnect can be loaded. Reference timing characteristics of the unloaded RROC are determined according to a calibration method including the steps of: (a) directly measuring signal propagation delay through each segment of the RROC; (b) modeling each test segment using an RC tree type reference circuit model having reference elements; (c) simulating the reference circuit model to provide a functional relationship between two reference capacitors; (d) defining upper and lower bounds for propagation delay through the test segment in terms of the reference elements; (e) determining values for the reference capacitor elements; and (f) measuring a reference frequency of oscillation of the unloaded RROC. After calibration, a test frequency of oscillation of the RROC is measured while a test interconnect structure is loaded onto a test segment. The period of the reference frequency is subtracted from the period of the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.