Method for using a hardmask to form an opening in a semiconductor substrate
US6008123A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1997 |
| Grant date | Dec 28, 1999 |
| Priority date | — |
| Expiry date | Nov 4, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/947
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method of forming a opening in a semiconductor dielectric layer. In an advantageous embodiment, the method comprises the steps of forming a hardmask layer on the dielectric layer wherein the hardmask layer has an etch rate less than an etch rate of the dielectric layer, forming a guide opening through the hardmask layer, forming a spacer within the guide opening that reduces a diameter of the guide opening and forming the opening in the dielectric layer through the guide opening. The method may further include the steps of depositing a conductive material in the opening and guide opening and over at least a portion of the hardmask layer that extends beyond the guide opening, and removing the hardmask layer and the conductive material layer that extend beyond the guide opening. In certain embodiments, the contact opening may be formed to a width equal to or less than 0.25 .mu.m.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.