Method for making a load resistor on a semiconductor chip
US6010938A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 1998 |
| Grant date | Jan 4, 2000 |
| Priority date | — |
| Expiry date | Nov 11, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/15
Abstract
The present invention provides a new method for making a load resistor in a semiconductor chip. According to the new method, a linear-shaped doped polysilicon layer is formed onto the surface of the semiconductor chip that comprises a Si substrate and an NSG layer. This layer functions as a conductive path. A slot is formed in this layer by removing a section from the conductive path. This slot reaches down to the NSG layer effectively cutting off the polysilicon layer. Then, a rugged polysilicon layer is evenly deposited onto the surface of the slot for connection of the conductive path. The polysilicon layer over the slot and the doped polysilicon layer defines the load resistor. The result is a high resistance value with usage of only a small space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.