Method of fabricating an integrated circuit using self-patterned thin films
US6022669A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jul 26, 1996 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Jul 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A first photosensitive liquid solution is applied to a substrate, patterned through exposure to radiation and development, and annealed to form a desired solid material, such as SrBi.sub.2 Ta.sub.2 O.sub.9, that is incorporated into a component of an integrated circuit Fabrication processes are designed protect the self-patterned solid material from conventional IC processing and to protect the conventional materials, such as silicon, from elements in the self-patterned solid material. In one embodiment, a layer of bismuth oxide is formed on the SrBi.sub.2 Ta.sub.2 O.sub.9 and a silicon oxide hole is etched to the bismuth oxide. The bismuth oxide protects the SrBi.sub.2 Ta.sub.2 O.sub.9 from the etchant, and is reduced by the etchant to bismuth. Any remaining bismuth oxide and much of the bismuth are vaporized in the anneal, and the remaining bismuth is incorporated into the SrBi.sub.2 Ta.sub.2 O.sub.9.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.