Method of using silicon oxynitride to improve fabricating of DRAM contacts and landing pads
US6022776A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 1999 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Apr 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
Abstract
A method for forming a DRAM cell of a DRAM circuit is disclosed. The DRAM circuit includes a periphery region and a cell region. The DRAM cell is in the cell region and comprises an access transistor and a capacitor. The access transistor has a gate, a source, and a drain. The periphery region includes a plurality of gates. The method comprises the deposition of a silicon oxynitride layer over the gates, the silicon oxynitride layer acting as a bottom anti-reflection coating. That portion of the silicon oxynitride layer that lies over the DRAM cell is removed. A landing pad is formed over the source of the access transistor and a bitline pad is formed over the drain of the transistor. Next, a first oxide layer is formed over the landing pad and the bitline pad. A capacitor is formed over the landing pad and a second oxide layer is formed over the capacitor. Finally, metal contacts are formed to at least one of the gates in the periphery region using the silicon oxynitride layer as a buffer layer to prevent substrate loss or overetching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.