System and method for detecting defects in an interlayer dielectric of a semiconductor device
US6023327A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1998 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Aug 10, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system for detecting defects in an interlayer dielectric (ILD) interposed between two conductive lines is provided. The system includes a processor for controlling general operations of the system. The system also includes a voltage source adapted to apply a bias voltage between the two conductive lines and induce a leakage current across the ILD. The system employs a light source to illuminate at least a portion of the ILD and enhance the leakage current. A current source is used to measure the induced leakage current, the current source being operatively coupled to the processor. The processor determines the existence of a defect in the ILD based on the measured leakage current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.