Low resistance gate electrode layer and method of making same
US6025254A · kind A · utility
10Cited by
12References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1997 |
| Grant date | Feb 15, 2000 |
| Priority date | — |
| Expiry date | Dec 23, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/662
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
3 A MOSFET having a low resistance gate electrode structure includes silicided source and drain regions, and a silicided gate electrode wherein the thickness of the silicide layer superjacent the gate electrode is substantially thicker than the silicide layers overlying the source and drain regions. A process in accordance with the present invention decouples the silicidation of MOSFET source/drain regions from the silicidation of the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.