Integrated circuit package and method of fabrication
US6028365A · kind A · utility
317Cited by
13References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1998 |
| Grant date | Feb 22, 2000 |
| Priority date | — |
| Expiry date | Mar 30, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a semiconductor package and its method of manufacture. Conductors mounted on a flexible polymer tape are used to connect a semiconductor chip to a substrate. The flexible polymer tape can be folded back under the chip to reduce the size necessary for mounting the assembly to almost that of the chip itself. The polymer tape also provides flexibility to reduce stresses on the electrical connections caused by thermal expansion and compression. Additionally, the present invention allows for the stacking of semiconductor chips on top of one another, reducing signal propagation delays between them.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.