Salman Akram
727Patents
91h-index
76Co-inventors
93Inventor score
Filing activity: Mar 7, 1994 → Sep 9, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6235554A | Method for fabricating stackable chip scale semiconductor package | Electricity | 674 | Expired |
| US5739585A | Single piece package for semiconductor die | Emerging Cross-Sectional Technologies | 523 | Expired |
| US6013948A | Stackable chip scale semiconductor package with mating contacts on opposed surfaces | Electricity | 456 | Expired |
| US5674785A | Method of producing a single piece package for semiconductor die | Emerging Cross-Sectional Technologies | 425 | Expired |
| US5495667A | Method for forming contact pins for semiconductor dice and interconnects | Emerging Cross-Sectional Technologies | 365 | Expired |
| US6114240A | Method for fabricating semiconductor components using focused laser beam | Electricity | 321 | Expired |
| US6028365A | Integrated circuit package and method of fabrication | Emerging Cross-Sectional Technologies | 317 | Expired |
| US6072236A | Micromachined chip scale package | Electricity | 314 | Expired |
| US5483741A | Method for fabricating a self limiting silicon based interconnect for testing bare semiconductor dice | Emerging Cross-Sectional Technologies | 301 | Expired |
| US6578458B1 | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions | Emerging Cross-Sectional Technologies | 290 | Expired |
| US6326698A | Semiconductor devices having protective layers thereon through which contact pads are exposed and stereolithographic methods of fabricating such semiconductor devices | Electricity | 265 | Expired |
| US6107109A | Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate | Electricity | 260 | Expired |
| US5736456A | Method of forming conductive bumps on die for flip chip applications | Emerging Cross-Sectional Technologies | 250 | Expired |
| US5686317A | Method for forming an interconnect having a penetration limited contact structure for establishing a temporary electrical connection with a semiconductor die | Emerging Cross-Sectional Technologies | 245 | Expired |
| US6169021A | Method of making a metallized recess in a substrate | Emerging Cross-Sectional Technologies | 243 | Expired |
| US6051878A | Method of constructing stacked packages | Emerging Cross-Sectional Technologies | 243 | Expired |
| US6122171A | Heat sink chip package and method of making | Electricity | 237 | Expired |
| US6124634A | Micromachined chip scale package | Electricity | 229 | Expired |
| US6294837A | Semiconductor interconnect having laser machined contacts | Electricity | 223 | Expired |
| US5990566A | High density semiconductor package | Electricity | 223 | Expired |
| US6228687A | Wafer-level package and methods of fabricating | Electricity | 223 | Expired |
| US6583503B2 | Semiconductor package with stacked substrates and multiple semiconductor dice | Emerging Cross-Sectional Technologies | 218 | Expired |
| US5946553A | Process for manufacturing a semiconductor package with bi-substrate die | Electricity | 213 | Expired |
| US5811879A | Stacked leads-over-chip multi-chip module | Electricity | 207 | Expired |
| US5994166A | Method of constructing stacked packages | Emerging Cross-Sectional Technologies | 200 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.