Process to create metallic stand-offs on an electronic circuit

US6036836A · kind A · utility

Inventors

• Joris Antonia Franciscus Peeters · Wilrijk, BE
• Louis Joseph Vandam · Brasschaat, BE
• Koenraad Juliaan Georges Allaert · Keerbergen, BE
• Ann Marie Ackaert · Lochristi, BE
• André Van Calster · Melle, BE
• Maria Eugenie Andre Vereeken · Evergem, BE
• Suixin Zhang · Toronto, CA
• Johan De Baets · Gentbrugge, BE
• Bart Vandevelde · Diest, BE

Key dates

• Filing date: Dec 19, 1997
• Grant date: Mar 14, 2000
• Expiry date: Dec 19, 2017

Classification

• Technology area (CPC H): Electricity
• CPC primary: H05K2203/072
• WIPO field: Audio-visual technology
• WIPO sector: Electrical engineering

Abstract

A process to create metallic stand-offs or studs on a printed circuit board (PCB). The process allows to obtain studs constituted by three successive layers of metal (Cu1, Cu2 and Cu3 or Ni) of which at least the two first layers are made of copper. The height of the so-created stand-off is sufficient to use it in the flip chip technology to assemble chips to a printed circuit board. The present process is implemented according either to the electro-plating (galvano-plating) or to the electrochemical-plating technique.