Method of surface treatment of semiconductor substrates
US6051503A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1997 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Aug 1, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/30655
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention relates to methods for treatment of semiconductor substrates and in particular a method of etching a trench in a semiconductor substrate in a reactor chamber using alternatively reactive ion etching and depositing a passivation layer by chemical vapour deposition, wherein one or more of the following parameters: gas flow rates, chamber pressure, plasma power, substrate bias, etch rate, deposition rate, cycle time and etching/deposition ratio vary with time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.