MOS-technology power device integrated structure
US6051862A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Nov 3, 1998 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Nov 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/251
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS-gated power device integrated structure comprises a plurality of elementary units formed in a semiconductor material layer of a first conductivity type. Each elementary unit is formed in a body stripe of a second conductivity type. There are a plurality of body stripes of the second conductivity type extending substantially in parallel to each other and at least one source region of the first conductivity type disposed within each body stripe. A conductive gate layer is insulatively disposed over the semiconductor material layer between the body stripes in the form of a first web structure. A second web structure of the second conductivity type is formed in the semiconductor material layer and comprises an annular frame portion surrounding the plurality of body stripes and at least one first elongated stripe extending between two sides of the annular frame portion in a direction substantially orthogonal to the body stripes and that is merged at each end with the annular frame portion. The body stripes are divided by the at least one first elongated stripe into at least two groups of body stripes, wherein one end of each body stripe is merged with the annular frame portion of …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.