Interlayer dielectric for passivation of an elevated integrated circuit sensor structure
US6051867A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 1999 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | May 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F77/933
Abstract
An integrated circuit sensor structure. The integrated circuit sensor structure includes a substrate which includes electronic circuitry. An interconnect structure is adjacent to the substrate. The interconnect structure includes conductive interconnect vias which pass through the interconnect structure. A dielectric layer is adjacent to the interconnect structure. The dielectric layer includes a planar surface, and conductive dielectric vias which pass through the dielectric layer and are electrically connected to the interconnect vias. The dielectric layer further includes an interlayer planarization dielectric layer adjacent to the interconnect structure, and a passivating layer adjacent to the interlayer planarization dielectric layer. The integrated circuit sensor structure further includes sensors adjacent to the dielectric layer. The interconnect vias and the dielectric vias electrically connect the electronic circuitry to the sensors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.