Grazing incident angle processing method for microelectronics layer fabrication
US6054390A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 1997 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Nov 5, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76837
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed horizontally spaced over the substrate a plurality of patterned microelectronics structures. There is then formed over the substrate and the plurality of patterned microelectronics structures a microelectronics layer. The microelectronics layer has a first region of the microelectronics layer interposed between the plurality of patterned microelectronics structures and a second region of the microelectronics layer not interposed between the plurality of microelectronics structures. Finally, there is processed through a grazing angle method the microelectronics layer, where the grazing angle method processes substantially all of the second region of the microelectronics layer without substantially processing the first region of the microelectronics layer. There is also disclosed a apparatus through which may be practiced the grazing angle method, where the apparatus employs a charged particle beam within the grazing angle method and where the charged particle beam is spirally magnetically constrained by a magnetic field per…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.