Method of fabricating a dynamic random access memory capacitor
US6054394A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 25, 1998 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Nov 25, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
Abstract
A fabricating method for a dynamic random access memory capacitor includes the following steps. A cap layer and a spacer are formed on the gate to protect the gate from being etched. A self-aligned contact hole is formed and then the self-aligned contact hole is etched again to form a contact node opening. In this way, the difficulty of forming the contact node opening can be reduced. The method of forming the storage electrode includes forming and patterning a stacked layer, which is formed by several conductive layers and isolation layers interlaced with each other, to form the self-aligned contact hole. A conductive spacer is formed on the sidewall of the stacked layer. The conductive spacer is used as a mask to etch the dielectric layer below the bit line so as to form a contact node opening. The contact opening exposes a source/drain region. A conductive layer is formed to fill the contact node opening. The conductive layer and the staked layer are patterned. The isolation layer of the stacked layer is removed to expose the storage electrode formed by the conductive layers and the conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.