Thin type semiconductor package
US6054774A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 1997 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Jul 9, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package having a board, at least one semiconductor chip, and flat type external connecting terminals, the board having a wiring circuit including connecting portions on a first main surface, the semiconductor being mounted on the first main surface, the flat type external connecting terminals being electrically connected to the semiconductor chip and formed on a second main surface of the board, wherein the flat type external connecting terminals are disposed in such a manner that any straight line which is arbitrarily drawn across the surface of a region to form the flat type external connecting terminals of the board runs on at least one of the flat type external connecting terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.