Annealing of silicon oxynitride and silicon nitride films to eliminate high temperature charge loss
US6071784A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 1997 |
| Grant date | Jun 6, 2000 |
| Priority date | — |
| Expiry date | Aug 29, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76895
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention includes a semiconductor device having a gate formed on a semiconductor substrate with a low hydrogen content etch stop or barrier layer formed over the gate, and methods for manufacturing a semiconductor device with an etch stop or barrier layer with low free hydrogen content. The semiconductor device may have a hydrogen getter layer formed between the gate and the etch stop or barrier layer. The etch stop or barrier layer is a high temperature PECVD nitride film, a high temperature PECVD oxynitride film or a high temperature LPCVD nitride film. The hydrogen getter layer is P-doped film having a thickness between about 500 .ANG. and about 2000 .ANG. and is a PSG, BPSG, PTEOS deposited oxide film, or a BPTEOS deposited oxide film. The low free hydrogen content of the etch stop layer or barrier layer is achieved by a high temperature annealing step, performed at a higher temperature than the deposition temperature of the etch stop or barrier layer. Specific uses of the etch stop or barrier layers include manufacture of electrical contacts and local interconnects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.