Inventor · Saratoga, CA, US

Radu Barsan

17Patents
11h-index
6Co-inventors
61Inventor score

Filing activity: May 23, 1995 → May 26, 2010

Most-cited inventions

PatentTitleAreaCited byStatus
US5587945A CMOS EEPROM cell with tunneling window in the read path Physics 98 Expired
US5646901A CMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistors Physics 86 Expired
US5672521A Method of forming multiple gate oxide thicknesses on a wafer substrate Emerging Cross-Sectional Technologies 65 Expired
US5942780A Integrated circuit having, and process providing, different oxide layer thicknesses on a substrate Electricity 46 Expired
US5959336A Decoder circuit with short channel depletion transistors Emerging Cross-Sectional Technologies 42 Expired
US5854114A Data retention of EEPROM cell with shallow trench isolation using thicker liner oxide Electricity 38 Expired
US5615150A Control gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistors Physics 29 Expired
US6071784A Annealing of silicon oxynitride and silicon nitride films to eliminate high temperature charge loss Electricity 28 Expired
US5761116A V.sub.pp only scalable EEPROM memory cell having transistors with thin tunnel gate oxide Physics 28 Expired
US5594687A Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase Physics 16 Expired
US6064105A Data retention of EEPROM cell with shallow trench isolation using thicker liner oxide Electricity 16 Expired
US5830795A Simplified masking process for programmable logic device manufacture Electricity 10 Expired
US5700698A Method for screening non-volatile memory and programmable logic devices Physics 6 Expired
US5908308A Use of borophosphorous tetraethyl orthosilicate (BPTEOS) to improve isolation in a transistor array Electricity 5 Expired
US6211022A Field leakage by using a thin layer of nitride deposited by chemical vapor deposition Electricity 2 Expired
US5841701A Method of charging and discharging floating gage transistors to reduce leakage current Physics 1 Expired
US8358889B2 Device fabrication with planar bragg gratings suppressing parasitic effects Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.