Method of patterning sidewalls of a trench in integrated circuit manufacturing
US6071815A · kind A · utility
34Cited by
14References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 2, 1998 |
| Grant date | Jun 6, 2000 |
| Priority date | — |
| Expiry date | Sep 2, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of patterning a layer on sidewalls of a trench in a substrate for integrated circuits includes the steps of forming an insulator layer on sidewalls of a trench in a substrate with a horizontal top surface above the sidewalls, recessing a masking material such as an organic photoresist in the trench below the top surface of the substrate such that a portion of the insulator layer on the sidewalls of the substrate is exposed, and etching the insulator layer with a gaseous hydrogen flouride-ammonia mixture. The masking material and the substrate are composed of a different material than the insulator layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.