LPCVD oxide and RTA for top oxide of ONO film to improve reliability for flash memory devices
US6074917A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 1998 |
| Grant date | Jun 13, 2000 |
| Priority date | — |
| Expiry date | Nov 11, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/954
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention relates to a method of forming a flash memory cell, involving the steps of forming a tunnel oxide on a substrate; forming a first polysilicon layer over the tunnel oxide; forming an insulating layer over the first polysilicon layer, the insulating layer comprising a first oxide layer over the first polysilicon layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer, wherein the second oxide layer is made by forming the second oxide layer by low pressure chemical vapor deposition at a temperature from about 600.degree. C. to about 850.degree. C. using SiH.sub.4 and N.sub.2 O and annealing in an N.sub.2 O atmosphere at a temperature from about 700.degree. C. to about 950.degree. C.; forming a second polysilicon layer over the insulating layer; etching at least the first polysilicon layer, the second polysilicon layer and the insulating layer, thereby defining at least one stacked gate structure; and forming a source region and a drain region in the substrate, thereby forming at least one memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.