Semiconductor trench MOS devices
US6077744A · kind A · utility
7Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 22, 1999 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Feb 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0297
Abstract
In a semiconductor device, a trench is etched into a surface of a semiconductor body comprising, from the surface down, a highly doped first (source) region; a moderately doped second (body) region; and a lightly doped third (drain) region. The trench walls are then oxidized. For reducing the effects of etching rate and oxide growing rate variations which occur at the junctions between regions of differing concentrations, the trench is first formed by etching and the trench walls then oxidized prior to the formation of the first region. Trenches having straighter walls and more uniformly thick oxides are thus formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.