Fabrication method for an insulation structure having a low dielectric constant
US6090698A · kind A · utility
Assignees
Inventor
Key dates
| Filing date | Jul 23, 1999 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | Jul 23, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low-dielectric constant insulation structure is described in which low-dielectric constant insulation layers and silicon oxide layers are alternately stacked on the substrate to form a stacked insulation layer. A required pattern is then etched in the stacked insulation layer followed by a selective etching to remove a portion of the low dielectric insulation layer to form, starting from the sidewall of the stacked insulation layer and extending inwardly, a plurality of recessed regions. A sputtering deposition and etching-back are further conducted on the sidewall of the stacked insulation layer to form a sidewall spacer to enclose the already formed recessed regions. A plurality of air-gaps is formed in the stacked insulation layer to establish a low dielectric insulation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.