Apparatuses and methods for polishing semiconductor wafers
US6093085A · kind A · utility
23Cited by
11References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1998 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Sep 8, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S451/921
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
The present disclosure relates to a polishing pad including a pad structure having at least first and second polishing regions defined along a polishing surface of the pad structure. The first polishing region of the pad structure is less compressible than the second polishing region of the pad structure. The present disclosure also relates to a polish platen including a platen structure having at least first and second regions adapted for supporting a polishing pad. The first region of the platen structure is less compressible than the second region of the platen structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.