Low and high voltage CMOS devices and process for fabricating same

US6096589A · kind A · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• John Lee · Boise, US
• Behnam Moradi · Boise, US
• Michael Westphal · Boise, US

Key dates

• Filing date: Feb 12, 1998
• Grant date: Aug 1, 2000
• Expiry date: Feb 12, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/856

Abstract

CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both NMOS and PMOS devices are doped with n-type dopant and NMOS gates are self-aligned.