Apparatus and method for fast unified interrupt recovery and branch recovery in processors supporting out-of-order execution
US6098167A · kind A · utility
26Cited by
24References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 31, 1997 |
| Grant date | Aug 1, 2000 |
| Priority date | — |
| Expiry date | Mar 31, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3863
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In maintaining the state of a processor, a dispatched instruction is given an identification tag and an associated entry in an architectural register table. The identification tag of the dispatched instruction is written to the entry in the architectural register table, if the identification tag of the dispatched instruction is more recent than a prior instruction identification tag stored in the entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.