Reduction of boron penetration by laser anneal removal of fluorine
US6100171A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 3, 1998 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Mar 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention relates to a method of removing fluorine from a gate conductor involving the steps of providing a semiconductor device containing a substrate, a gate insulator layer overlying a portion of the substrate, a gate conductor containing fluorine overlying the gate insulator layer, and a source and a drain region adjacent the gate insulator layer; and laser annealing the semiconductor device at an energy level sufficient to melt at least a portion of the gate conductor thereby inducing the removal of fluorine from the gate conductor. In another embodiment, the present invention relates to a method of making a transistor involving the steps of forming a gate conductor overlying a gate insulator layer, wherein the gate conductor and the gate insulator layer overlie a portion of a substrate, doping the substrate and gate conductor with BF.sub.2.sup.+ to form in the substrate a source region and a drain region adjacent the gate insulator layer and a channel region between the source and drain regions and under the gate insulator layer; laser annealing the doped gate conductor, the doped source region and the doped drain region at an energy level suffi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.