Calibratable programmable phase shifter
US6104223A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 1998 |
| Grant date | Aug 15, 2000 |
| Priority date | — |
| Expiry date | Jan 30, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable phase shifter includes a tapped delay line for successively delaying a periodic reference signal to produce a set of phase distributed tap signals. A multiplexer selects one of the tap signals as input to a programmable delay circuit which further delays the selected tap signal to produce an output signal that is phase shifted from the reference signal. A programmable data converter converts input data indicting a desired phase shift between the reference signal and the output signal into data for controlling the multiplexer selection and the amount of delay provided by the programmable delay circuit. The relationship between conversion table input and output data is adjusted so that the period of the output signal has a desired linear relationship to the input data value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.