FPGA CLE with two independent carry chains
US6107827A · kind A · utility
48Cited by
67References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 13, 1999 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | May 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention provides an FPGA comprising an array of identical tiles. Each tile comprises a logic block that includes a Configurable Logic Element (CLE). In one embodiment, the CLE is implemented in two similar portions called "slices". Each slice has a separate carry chain. In a CLE with four function generators, each carry chain incorporates the outputs of two function generators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.