Inventor · San Jose, CA, US

Sridhar Krishnamurthy

32Patents
11h-index
76Co-inventors
78Inventor score

Filing activity: Oct 10, 1996 → Apr 24, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US6467009B1 Configurable processor system unit Physics 213 Expired
US6574655B1 Associative management of multimedia assets and associated resources using multi-domain agent-based communication between heterogeneous peers Emerging Cross-Sectional Technologies 193 Expired
US5963050A Configurable logic element with fast feedback paths Electricity 118 Expired
US5936424A High speed bus with tree structure for selecting bus driver Electricity 108 Expired
US5942913A FPGA repeatable interconnect structure with bidirectional and unidirectional interconnect lines Electricity 71 Expired
US6107827A FPGA CLE with two independent carry chains Electricity 48 Expired
US5847580A High speed bidirectional bus with multiplexers Electricity 22 Expired
US7111214B1 Circuits and methods for testing programmable logic devices using lookup tables and carry chains Physics 16 Expired
US5844424A Programmably bidirectional buffered interconnect circuit Electricity 13 Expired
US6754760B1 Programmable interface for a configurable system bus Physics 13 Expired
US6944809B2 Methods of resource optimization in programmable logic devices to reduce test time Physics 13 Expired
US7058919B1 Methods of generating test designs for testing specific routing resources in programmable logic devices Physics 11 Expired
US7926016B1 Timing driven logic block configuration Physics 10 Active
US7478356B1 Timing driven logic block configuration Physics 9 Active
US7610573B1 Implementation of alternate solutions in technology mapping and placement Physics 7 Active
US10068048B1 Generating clock trees for a circuit design Physics 5 Active
US8448122B1 Implementing sub-circuits with predictable behavior within a circuit design Physics 5 Active
US7249335B1 Methods of routing programmable logic devices to minimize programming time Physics 5 Active
US7143384B1 Methods of routing programmable logic devices to minimize programming time Physics 4 Expired
US8010923B1 Latch based optimization during implementation of circuit designs for programmable logic devices Physics 3 Active
US6658547B1 Method and apparatus for specifying address offsets and alignment in logic design Physics 3 Expired
US10042971B1 Placement and routing of clock signals for a circuit design Physics 2 Active
US6661812B1 Bidirectional bus for use as an interconnect routing resource Electricity 2 Expired
US9330220B1 Clock region partitioning and clock routing Physics 2 Active
US10366201B1 Timing closure of circuit designs for integrated circuits Physics 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.