Globally or selectively disabling branch history table operations during sensitive portion of millicode routine in millimode supporting computer
US6108776A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1998 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Apr 30, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A millimode capable computer system provides control to millicode to allow the BHT operations to continue except when the these special situations occur that require control of instruction fetch operations must be provided and the BHT can be turned off for some sections of code execution, but not disabled for all. A single free running BHT functions for both a normal mode and a millimode for the central processor which can execute in millimode with a branch history table directing instruction fetch for which both a global BHT disable and millicode disables exist. Hit detection logic receives input from the global BHT disable, as well as from an initialized control register bit and a processor control register bit to select the correct set target information and generate a "branch history table hit detected" control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.