Flip-chip connection type semiconductor integrated circuit device
US6111317A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 1997 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | Jan 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A first insulating film is formed on an integrated circuit chip on which an I/O pad is formed. A first opening portion is formed above the I/O pad. A conductive layer and a barrier metal layer which are electrically connected to the I/O pad through the first opening portion are stacked on the first insulating film. The conductive layer and the barrier metal layer are patterned by a single mask. A second insulating film is formed on the resultant structure. A second opening portion is formed in the second insulating film at a position different from that of the first opening portion. A solder bump or metal pad is formed on the barrier metal layer in the second opening portion. The position of the solder bump or metal pad is defined by the second opening portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.