Methods for shallow trench isolation
US6114216A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1996 |
| Grant date | Sep 5, 2000 |
| Priority date | — |
| Expiry date | Nov 13, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.