Method for forming isolation trenches on a semiconductor substrate
US6114217A · kind A · utility
5Cited by
6References
16Claims
0Family size
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Key dates
| Filing date | Nov 24, 1998 |
| Grant date | Sep 5, 2000 |
| Priority date | — |
| Expiry date | Nov 24, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/05
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for providing an insulation trench on a semiconductor substrate. The method includes the steps of depositing a pad oxide layer and a nitride layer on a semiconductor substrate; etching the nitride layer and the pad oxide layer and depositing a first insulating layer; forming spacers along sidewalls of the pad oxide layer and the nitride layer by anisotropic etching the first insulating layer; forming trenches by etching the semiconductor substrate; forming a trench insulating layer pattern by depositing a second insulating layer and etching the same; and polishing the trench insulating layer pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.