Apparatus and method for testing a flip chip integrated circuit package adhesive layer
US6117695A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 1998 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | May 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73204
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus and method are presented for testing an adhesive layer formed between an integrated circuit and a plate, wherein the plate may be semiconductor device package substrate or a heat spreader. The apparatus includes a pull stud and a pull arm. The pull stud has an upper portion and a lower portion, wherein the lower portion is attached to a surface of the integrated circuit opposite the plate. The upper portion of the pull stud may be, for example, a tapered cylinder having a large end and a small end. The small end meets the lower portion of the pull stud. The pull arm has two opposed ends and at least one bracket for receiving a force. One of the pull arm ends has a "V"-shaped opening surrounded by a lip which receives the upper portion of the pull stud. During use, the lip contacts and retains the upper portion of the pull stud. The opening has an upper wall, and an upper surface of the pull stud contacts the upper wall when the upper portion of the pull stud is inserted into the opening. The lip is vertically displaced from the upper wall such that the lip contacts the upper portion of the pull stud a spaced distance from where the upper surface of the pull stud contac…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.