Interconnect structure for joining a chip to a circuit card
US6121069A · kind A · utility
49Cited by
20References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1999 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | Sep 3, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A solder interconnection uses preferably lead-rich balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate. After a solder ball has been formed using standard processes, a ball limiting metal mask is formed using photoresist. A thin cap layer of preferably pure tin is deposited on a surface of the solder balls using a tin aqueous immersion process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.