Latch-up free power MOS-bipolar transistor
US6121633A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 1998 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | May 21, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/121
Abstract
A MOS bipolar transistor is provide which includes a silicon carbide npn bipolar transistor formed on a bulk single crystal n-type silicon carbide substrate and having an n-type drift layer a p-type base layer. Preferably the base layer is formed by epitaxial growth and formed as a mesa. A silicon carbide nMOSFET is formed adjacent the npn bipolar transistor such that a voltage applied to the gate of the nMOSFET causes the npn bipolar transistor to enter a conductive state. The nMOSFET has a source and a drain formed so as to provide base current to the npn bipolar transistor when the bipolar transistor is in a conductive state. Also included are means for converting electron current flowing between the source and the drain into hole current for injection into the p-type base layer. Means for reducing field crowding associated with an insulating layer of said nMOSFET may also be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.