Scalable and reliable integrated circuit inter-level dielectric
US6124640A · kind A · utility
14Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1998 |
| Grant date | Sep 26, 2000 |
| Priority date | — |
| Expiry date | Aug 31, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31051
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An inter-level dielectric (ILD) is formed from a lower barrier layer comprising a conformal silicon oxynitride layer, a gap fill layer comprising a high-density plasma (HDP) oxide and a cap layer. The use of HDP oxide as a gap fill layer enables better control of the ILD thickness, avoids outgasing problems, facilitates via formation and reduces planarization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.