Method of engaging electrically conductive test pads on a semiconductor substrate
US6124721A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 1997 |
| Grant date | Sep 26, 2000 |
| Priority date | — |
| Expiry date | Oct 31, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49204
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.