Silicon nitride deposition method for use in forming a memory cell dielectric
US6127287A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 1997 |
| Grant date | Oct 3, 2000 |
| Priority date | — |
| Expiry date | Oct 22, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02271
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for use in forming a memory cell dielectric includes providing a substrate surface of a memory cell including a silicon based electrode surface. Silicon is predeposited on the electrode surface followed by the deposition of a silicon nitride layer. An incubation time for the start of silicon nitride nucleation at the electrode surface is decreased relative to the incubation time for the start of silicon nitride nucleation when silicon nitride is deposited without predeposition of silicon on the electrode surface. Further, the substrate surface may include one or more component surfaces and when at least a monolayer of silicon is predeposited thereon silicon nitride nucleation at the substrate surface is performed at a substantially equivalent rate independent of the different component surfaces. Alternatively to the predeposition of silicon, the electrode surface may be nitridated prior to deposition of the silicon nitride layer to promote nucleation thereof at an interface between the electrode surface and the silicon nitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.