Method for forming semiconductor structures using a calibrating reticle
US6130016A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 9, 1999 |
| Grant date | Oct 10, 2000 |
| Priority date | — |
| Expiry date | Apr 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70483
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A device and method to prepare a stepper to form semiconductor structure lines by using a calibration reticle to determine optimum numerical aperture and partial coherence values for the stepper. The calibration reticle includes a light-transmissive substrate having a plurality of patterns disposed thereon, each of the plurality of patterns including a series of structures of a constant size spaced an equal distance from one another and having a predetermined pitch intended to mimic a pitch value of a semiconductor structure reticle. The method includes positioning the calibration reticle on a stepper and optimizing the performance characteristics (e.g., the partial coherence value and the numerical aperture value) of the stepper using one of the patterns of the calibration reticle corresponding to a predetermined pitch of a semiconductor structure reticle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.