Device and method for protecting an integrated circuit during an ESD event

US6130811A · kind A · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Dean D. Gans · Nampa, US
• Ken Marr · Boise, US

Key dates

• Filing date: Jan 7, 1997
• Grant date: Oct 10, 2000
• Expiry date: Jan 7, 2017

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/811

Abstract

An integrated circuit having a voltage protection circuit in electrical communication with an input buffer of the integrated circuit and a method for providing voltage protection to the input buffer are disposed. In one exemplary embodiment, the voltage protection circuit is an active device, such as a transistor, in electrical communication with an input node of the input buffer. When the active device actuates it provides a current path which limits a potential seen at the input buffer to a value less than an electrostatic discharge (ESD) potential. In one implementation the active device responds to a voltage which develops in response to current flow in an ESD circuit, and in a further implementation it responds to a gate to source potential during an ESD event. In both implementations the active device is actuated during an ESD event and is deactuated during normal operation of the circuit. In a further exemplary embodiment an isolation circuit is interposed between a supply node of the input buffer and the input buffer. When no external power is applied to the supply node the isolation circuit is open, isolating the input buffer from the supply node. The potential of the bond…